Implementation of Ahb Bus Tracer with Dynamic Multiresolution for Lossless Real Time Compression

In the system-on-chip (SoC) debugging and performance analysis/optimization, monitoring the on-chip bus signals are necessary. But, such signals are difficult to observe since they are deeply embedded in a SoC and no sufficient I/O pins to access those signals. Therefore, we embed a bus tracer in SoC to capture the bus signals and store them.The stored trace memory can be loaded to the trace analyzer software for analysis. In this paper a multiresolution AHB On-Chip bus tracer is proposed for system-on-chip (SoC) debugging and monitoring which is capable of capturing the bus trace with different resolutions and efficient built-in compression mechanisms.In addition, it allows the user to switch the trace resolution dynamically so that appropriate resolution levels can be applied to different segments of the trace. It also supports tracing after/before an event triggering, named post-triggering trace/pre-triggering trace, respectively. The SoC can be verified in field-programmable gate array.